74ALVCH16500DG-T 18-bit universal bus transceiver (3-State) - Description: 2.5/3.3V 18-Bit Universal Bus Transceiver; Negative Edge Trigger Clock with Bus Hold (3-State) ; Logic switching levels: TTL ; Number of pins: 56 ; Output drive capability: +/- 24 mA ; Power dissipation considerations: Low Power or Battery Applications ; Propagation delay: 2.9@3.3V ns; Voltage: 2.3-3.6